CVE-2026-50185: Cmov/CmovEq on aarch64 can produce wrong results if high-bits of registers are set

July 2, 2026

The aarch64 implementations of Cmov and CmovEq seem to assume that the high bits when loading a value of size smaller than a register into a register are zero-extended. However, this is not the case and these bits are unspecified. This can result in a left.cmovz(&right, condition) not moving right into left, even if condition == 0.

References

github.com/RustCrypto/utils/security/advisories/GHSA-3rjw-m598-pq24
github.com/advisories/GHSA-3rjw-m598-pq24
nvd.nist.gov/vuln/detail/CVE-2026-50185

Code Behaviors & Features

Detect and mitigate CVE-2026-50185 with GitLab Dependency Scanning

Secure your software supply chain by verifying that all open source dependencies used in your projects contain no disclosed vulnerabilities. Dependency Scanning using SBOM also detects vulnerabilities from proprietary advisories that this site does not include. Learn more about Dependency Scanning using SBOM →